IBM published an article in Science magazine said that the chipmaker has succeeded for the first time ever, burning a wafer of silicon carbide with circuits and transistors with graphene coupled coils. The chip in question is a radio frequency converter capable of operating at 10 GHz. Big Blue says it has an impressive thermal stability.
Specifically, it can operate at a temperature between 300 degrees Kelvin (26.85 ° C) and 400 Kelvin (126.85 ° C) without loss of performance, increasing only the noise of a decibel. This gives a die that is not afraid of extreme temperature changes. It is a very promising first step. Graphene is a sheet composed of carbon atoms arranged in a lattice of hexagonal crystals that are commonly compared to a honeycomb.
In February 2010, IBM showed a graphene transistor operating at 100 GHz (see "The graphene transistor fastest). The fact that he has now managed to burn a full wafer is a great step forward. Big Blue is aware that graphene will not replace silicon anytime soon, if ever. There is little doubt that the findings released today are very symbolic.
Until now, research published in 2009 and 2010 by MIT, Rice University and the University of California Riverside had simply create dies consisting of a graphene transistor connected to passive elements located at outside the die. The results were interesting, but the chip suffered from this arrangement.
Specifically, the paper published by MIT in 2010 had a radio frequency converter operating at 10 MHz. Today, the IBM can reach 10 GHz. The grouping of all components on a single die and to take advantage of a wafer and silicon carbide transistors and circuits on graphene will greatly improve performance.
Graphene has electrical and thermal properties are very promising. This is an excellent driver who tolerate large temperature changes and adapts better to increase the fineness of the silicon etching, which also suffers a lot more heat. Graphene is the promised land of processors and other components that work with semiconductors, which is why it is the object of much research.
Scientists want to facilitate their production and especially how it can be manipulated (see "Towards graphene transistors" or "From graphene and water as the transistor). Laboratories worldwide are working on methods of manufacture as diverse as each other. Some seek to make chemical agents.
Other heat the tip of a atomic force microscope to exfoliate the oxide layer and reveal the graphene (see 'Burn 12-nm graphene). Still others are working on silicon carbide wafers that combine the carbon and silicon. In short, the graphene chips are still far from mainstream markets, but also a fundamental issue which fascinates researchers and industrialists.
It is also no coincidence that the Nobel Prize in physics last year was awarded to Andre Geim and Novoselov Konstantin who in 2004 discovered graphene from graphite and shed light on its physical and electric. Seven years after the discovery of graphene, the mass production of chips using this material is still far and so researchers are limited to frequency converters, because they have an architecture simple enough to not hinder the experience already complex.
This is a very common technique in industry. The smelters are testing new subtleties of printmaking by making memory modules since they are basic structures that can more easily complete a half-pitch before moving to a complex architecture, like that of an x86 processor. (See "Miniaturization of transistors and larger wafers).
Similarly, graphene represents a major challenge for scientists, which explains why they are trying to burn a simple structure, like that of a frequency converter. Specifically, a die in graphene is more complex to produce because its properties require different manufacturing processes.
For example, mechanisms of formation of ohmic contacts must be radically different. The ohmic contacts are regions of the semiconductor with a very low contact resistance which is already so complex to manufacture on a conventional silicon die that experts like to refer to an art instead of a manufacturing process.
Graphene is also complex because it adheres poorly to metals and oxides, which makes the creation of integrated circuits even more difficult. Furthermore, graphene is mismanaging the plasma treatment, a process that attempts to modify the physical and chemical properties of a surface that is a necessary step for making a die.
The paper describes IBM's first manufacturing processes across the wafer. It is no longer a question of producing a transistor, but a series of dies on a wafer. The architecture of IBM was made a graphene transistor coupled to two coils. The integrated circuit has an area of 1 mm2. Specifically, researchers face two to three layers of graphene on a wafer of silicon carbide (SiC).
They use the epitaxy, a process that will grow the graphene layers on the silicon face of SiC. This technique requires a temperature of 1400 ° C. Graphene is then covered with a layer of polymethyl methacrylate (PMMA) of 140 nm thick. Popularizing, it is a layer of plexiglass. They add to that a layer of resin HSQ (hydrogen silsesquioxane) of 20 nm thickness used in electron beam lithography.
The whole is then treated with oxygen plasma to remove any excess and ensure that the graphene layer HSQ-PMMA is protecting the graphene which is below. As we can see, this layer of plexiglass and resin addresses the problem of plasma processing of graphene. The HSQ reacts to the electron beam coming to burn the necessary circuitry.
The sections of the wafer bombarded by the electron beam will then react with acetone to reveal the circuits in graphene. This technique is fundamental because it is solving a problem of manufacturing a wafer in graphene. The fact that the rest of the wafer is covered with a layer of HSQ-PMMA can affix metals and oxides for the proper functioning of the chip.
The ohmic contacts for source and drain, and gate electrode are composed of a 20 nm layer of palladium and 40 nm gold. As mentioned at the beginning, the metals do not adhere to graphene. Using a layer of HSQ-PMMA and not revealing graphene as the active channels of the source and drain which will serve to channel the electrons, it is possible to install the necessary components while taking advantage of the electrical properties of graphene.
The source and drain are placed on channels graphene revealed by acetone. This is the first metal layer or M1. Then the insulating layer of aluminum oxide (Al2O3) 20 nm, which will separate the couple source - drain the grid that represents the second metal layer (M2). It then installs spacers of silicon dioxide 120 nm thick, which will isolate the coils (M3) layers M2 and M1.
This technique allows for the first time to group all these people on a single die of silicon carbide. IBM got a very simple architecture that appears to have been etched in 300 nm and using a grid with a length of 550 nm according to the paper. Scientists say it would be possible to adapt the method of manufacture described today lithographic optical methods, such as using an argon fluoride laser which is more widely used in existing plants and more profitable than the beam Electron.
They are also aware that it is necessary to use an insulating layer of a High-K dielectric, such as hafnium dioxide layer of 2 nm, instead of the one used today, which has poor performance. The message from IBM is a better insulating layer and a miniaturization of the grid that would reach 40 nm in length would increase transistor performance by 10 to get diseases that could be mass manufactured competing models Today in silicon.
The chip IBM has properties markedly superior to that of other researchers working on graphene, but it remains below the models sold today. In short, there is still much progress to make, but this first die in graphene is a fundamental step in the miniaturization of transistors and the post-silicon.
While writing this article, a quote we came up frequently in the head. We therefore conclude by the famous words of Neil Armstrong, "This is small step for man, one giant leap for mankind". 
Specifically, it can operate at a temperature between 300 degrees Kelvin (26.85 ° C) and 400 Kelvin (126.85 ° C) without loss of performance, increasing only the noise of a decibel. This gives a die that is not afraid of extreme temperature changes. It is a very promising first step. Graphene is a sheet composed of carbon atoms arranged in a lattice of hexagonal crystals that are commonly compared to a honeycomb.
In February 2010, IBM showed a graphene transistor operating at 100 GHz (see "The graphene transistor fastest). The fact that he has now managed to burn a full wafer is a great step forward. Big Blue is aware that graphene will not replace silicon anytime soon, if ever. There is little doubt that the findings released today are very symbolic.
Until now, research published in 2009 and 2010 by MIT, Rice University and the University of California Riverside had simply create dies consisting of a graphene transistor connected to passive elements located at outside the die. The results were interesting, but the chip suffered from this arrangement.
Specifically, the paper published by MIT in 2010 had a radio frequency converter operating at 10 MHz. Today, the IBM can reach 10 GHz. The grouping of all components on a single die and to take advantage of a wafer and silicon carbide transistors and circuits on graphene will greatly improve performance.
Graphene has electrical and thermal properties are very promising. This is an excellent driver who tolerate large temperature changes and adapts better to increase the fineness of the silicon etching, which also suffers a lot more heat. Graphene is the promised land of processors and other components that work with semiconductors, which is why it is the object of much research.
Scientists want to facilitate their production and especially how it can be manipulated (see "Towards graphene transistors" or "From graphene and water as the transistor). Laboratories worldwide are working on methods of manufacture as diverse as each other. Some seek to make chemical agents.
Other heat the tip of a atomic force microscope to exfoliate the oxide layer and reveal the graphene (see 'Burn 12-nm graphene). Still others are working on silicon carbide wafers that combine the carbon and silicon. In short, the graphene chips are still far from mainstream markets, but also a fundamental issue which fascinates researchers and industrialists.
It is also no coincidence that the Nobel Prize in physics last year was awarded to Andre Geim and Novoselov Konstantin who in 2004 discovered graphene from graphite and shed light on its physical and electric. Seven years after the discovery of graphene, the mass production of chips using this material is still far and so researchers are limited to frequency converters, because they have an architecture simple enough to not hinder the experience already complex.
This is a very common technique in industry. The smelters are testing new subtleties of printmaking by making memory modules since they are basic structures that can more easily complete a half-pitch before moving to a complex architecture, like that of an x86 processor. (See "Miniaturization of transistors and larger wafers).
Similarly, graphene represents a major challenge for scientists, which explains why they are trying to burn a simple structure, like that of a frequency converter. Specifically, a die in graphene is more complex to produce because its properties require different manufacturing processes.
For example, mechanisms of formation of ohmic contacts must be radically different. The ohmic contacts are regions of the semiconductor with a very low contact resistance which is already so complex to manufacture on a conventional silicon die that experts like to refer to an art instead of a manufacturing process.
Graphene is also complex because it adheres poorly to metals and oxides, which makes the creation of integrated circuits even more difficult. Furthermore, graphene is mismanaging the plasma treatment, a process that attempts to modify the physical and chemical properties of a surface that is a necessary step for making a die.
The paper describes IBM's first manufacturing processes across the wafer. It is no longer a question of producing a transistor, but a series of dies on a wafer. The architecture of IBM was made a graphene transistor coupled to two coils. The integrated circuit has an area of 1 mm2. Specifically, researchers face two to three layers of graphene on a wafer of silicon carbide (SiC).
They use the epitaxy, a process that will grow the graphene layers on the silicon face of SiC. This technique requires a temperature of 1400 ° C. Graphene is then covered with a layer of polymethyl methacrylate (PMMA) of 140 nm thick. Popularizing, it is a layer of plexiglass. They add to that a layer of resin HSQ (hydrogen silsesquioxane) of 20 nm thickness used in electron beam lithography.
The whole is then treated with oxygen plasma to remove any excess and ensure that the graphene layer HSQ-PMMA is protecting the graphene which is below. As we can see, this layer of plexiglass and resin addresses the problem of plasma processing of graphene. The HSQ reacts to the electron beam coming to burn the necessary circuitry.
The sections of the wafer bombarded by the electron beam will then react with acetone to reveal the circuits in graphene. This technique is fundamental because it is solving a problem of manufacturing a wafer in graphene. The fact that the rest of the wafer is covered with a layer of HSQ-PMMA can affix metals and oxides for the proper functioning of the chip.
The ohmic contacts for source and drain, and gate electrode are composed of a 20 nm layer of palladium and 40 nm gold. As mentioned at the beginning, the metals do not adhere to graphene. Using a layer of HSQ-PMMA and not revealing graphene as the active channels of the source and drain which will serve to channel the electrons, it is possible to install the necessary components while taking advantage of the electrical properties of graphene.
The source and drain are placed on channels graphene revealed by acetone. This is the first metal layer or M1. Then the insulating layer of aluminum oxide (Al2O3) 20 nm, which will separate the couple source - drain the grid that represents the second metal layer (M2). It then installs spacers of silicon dioxide 120 nm thick, which will isolate the coils (M3) layers M2 and M1.
This technique allows for the first time to group all these people on a single die of silicon carbide. IBM got a very simple architecture that appears to have been etched in 300 nm and using a grid with a length of 550 nm according to the paper. Scientists say it would be possible to adapt the method of manufacture described today lithographic optical methods, such as using an argon fluoride laser which is more widely used in existing plants and more profitable than the beam Electron.
They are also aware that it is necessary to use an insulating layer of a High-K dielectric, such as hafnium dioxide layer of 2 nm, instead of the one used today, which has poor performance. The message from IBM is a better insulating layer and a miniaturization of the grid that would reach 40 nm in length would increase transistor performance by 10 to get diseases that could be mass manufactured competing models Today in silicon.
The chip IBM has properties markedly superior to that of other researchers working on graphene, but it remains below the models sold today. In short, there is still much progress to make, but this first die in graphene is a fundamental step in the miniaturization of transistors and the post-silicon.
While writing this article, a quote we came up frequently in the head. We therefore conclude by the famous words of Neil Armstrong, "This is small step for man, one giant leap for mankind".
- IBM Preps Graphene For High-Frequency Chips (10/06/2011)
- IBM Preps Graphene For High-Frequency Chips (09/06/2011)
- Speedier Cell Phone Circuitry (09/06/2011)
- IBM pioneers graphene-based integrated circuits (09/06/2011)
- IBM has shown graphene can be used for 10 gigahertz frequency mixers and plans are to get to terahertz speeds (10/06/2011)
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